Originally Posted by
pueywei
One wouldn't get much, if any, power savings over disabling a core in the methods described. Unless specifically designed for it, the core is still power. The chip would have to be designed to have split power panes for it to work.
Reducing the core voltage is much more effective. Power draw is dependent on the square of the voltage, and is proportional to clock speed.
This is incorrect. The processor is built on a CMOS process. Power is consumed when the logic changes state, ie froma 1 ->0 or 0-> 1 transition. You turnoff the clock to the CPU and it will draw negligible power.